A. Field of the Invention
This invention relates to computer memories and, more specifically, to a circuit which allows the use of defective memory chips in a computer main memory.
B. Description of the Prior Art
In the production of solid-state memory chips for use in computer main memories, the number of defective parts manufactured far outnumbers the production of perfect parts. A yield rate of ten to twenty percent is not uncommon in the production of large-scale integrated (LSI) chips. Of course, defective parts are typically discarded. If a method could be devised for using defective parts, costs could be reduced by a factor of two to four.
In random access memory (RAM) chips, a typical failure is that a bit in the chip will be either "struck at 1," or "stuck at 0." That means that regardless of the value of the data bit intended to be loaded into a particular bit location, the output will either always be 1 or 0.
If, in a fully assembled random access memory, there is no more than one defective bit per word, then the following process may be employed to allow the memory to store and read data without fault in spite of the defective bit.
Each time a word is written into memory, it is immediately read back and compared with the original word. If the bad bit, for example, is stuck at 1, and if the bit intended to be written into that bad position is also a 1, then when the word is read from memory and compared with the original, there will be a bit by bit equality. In this case, the fact that the memory contains one defective bit will not affect the operation of the system and no corrective action is necessary.
On the other hand, if there is an attempt to write a 0 into a bit that is stuck at 1, then the word written into memory and the word read from memory will not compare identically. In this case the data word is complemented and again written into memory in its complemented form. This time, for example, a 1 will be written into the memory bit that is stuck at 1 so that, at some later time, when the data is read from this memory word, it will be identical to the word actually stored. All that is necessary is that the word be complemented again before being used.
One bit must be added to the memory word length and is used as a flag bit to indicate whether the data in that memory word location has been complemented or not. Thus, if the word was written into memory in its complement form, a 1 will be entered in the flag position. At some time thereafter when data is read from this memory location the flag bit will also be read.
If the flag is 0, the data is used as it is received from the memory. If the flag bit is at 1, the data is complemented before being used. In all cases, therefore, the data ultimately read from the memory will be correct in spite of the fact that each memory word location may have a defective bit. In this way, defective parts may be used in a memory without impairing the accuracy of the data.
A disadvantage of this process is that every word that is written into memory must immediately be read out and compared with the original word. This reduces the speed of the system.